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  1 1 2 3 5 4 scl gnd sda wp vcc 1 2 3 4 8 7 6 5 a0 a1 a2 gnd vcc wp scl sda 1 2 3 4 8 7 6 5 vcc wp scl sda a0 a1 a2 gnd vcc wp scl sda a0 a1 a2 gnd 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 a0 a1 a2 gnd vcc wp scl sda 1 2 3 4 8 7 6 5 a0 a1 a2 gnd vcc wp scl sda 8-lead soic 8-ball dbga2 8-lead mini-map (mlp 2x3) 8-lead pdip 5-lead sot23 bottom view bottom view 8-lead tssop features ? low-voltage and standard-voltage operation ? 1.8 (v cc = 1.8v to 5.5v)  internally organized 256 x 8 (2k)  two-wire serial interface  schmitt trigger, filtered inputs for noise suppression  bidirectional data transfer protocol  1 mhz (5v), 400 khz (1.8v, 2.5v, 2.7v) compatibility  write protect pin for ha rdware data protection  8-byte page (2k) write modes  partial page writes allowed  self-timed write cycle (5 ms max)  high-reliability ? endurance: 1 million write cycles ? data retention: 100 years  8-lead pdip, 8-lead jedec soic, 8-le ad mini-map (mlp 2 x3), 5-lead sot23, 8-lead tssop and 8-ball dbga2 packages  lead-free/halogen-free  die sales: wafer form, waffle pack and bumped wafers description the at24c02b provides 204 8 b its of seri a l electric a lly er a s ab le a nd progr a mm ab le re a d-only memory (eeprom) org a nized a s 256 words of 8 b its e a ch. the device is optimized for use in m a ny industri a l a nd commerci a l a pplic a tions where low-power a nd low-volt a ge oper a tion a re essenti a l. the at24c02b is a v a il ab le in sp a ce-s a ving 8 -le a d pdip, 8 -le a d jedec s oic, 8 -le a d mini-map (mlp 2x 3 ) , 5-le a d s ot2 3 , 8 -le a d t ss op, a nd 8 - ba ll dbga2 p a ck a ges a nd is a ccessed vi a a tw o - w i r e s e r i a l interf a ce. in a ddition, the at24c02b is a v a il ab le in 1. 8 v (1. 8 v to 5.5v) version. table 1. pin configur a tion pin name function a0 - a2 address inputs s da s eri a l d a t a s cl s eri a l clock input wp write protect nc no connect gnd ground vcc power s upply two-wire serial eeprom 2k (256 x 8) at24c02b 5126b? s eepr?10/05
2 at24c02b 5126b? s eepr?10/05 figure 1. block di a gr a m absolute maximum ratings oper a ting temper a ture..................................?55 c to +125 c *notice: s tresses b eyond those listed under ?a b solute m a ximum r a tings? m a y c a use perm a nent d a m- a ge to the device. this is a stress r a ting only a nd function a l oper a tion of the device a t these or a ny other conditions b eyond those indic a ted in the oper a tion a l sections of this specific a tion is not implied. exposure to ab solute m a ximum r a ting conditions for extended periods m a y a ffect device reli ab ility. s tor a ge temper a ture .....................................?65 c to +150 c volt a ge on any pin with respect to ground .................................... ?1.0v to +7.0v m a ximum oper a ting volt a ge .......................................... 6.25v dc output current........................................................ 5.0 ma
3 at24c02b 5126b? s eepr?10/05 pin description serial clock (scl): the s cl input is used to positive edge clock d a t a into e a ch eeprom device a nd neg a tive edge clock d a t a out of e a ch device. serial data (sda): the s da pin is b idirection a l for seri a l d a t a tr a nsfer. this pin is open-dr a in driven a nd m a y b e wire-ored with a ny num b er of other open-dr a in or open- collector devices. device/page addresses (a2, a1, a0): the a2, a1 a nd a0 pins a re device a ddress inputs th a t a re h a rd wired for the at24c02b. as m a ny a s eight 2k devices m a y b e a ddressed on a single b us system (device a ddressing is discussed in det a il under the device addressing section). write protect (wp): the at24c02b h a s a write protect pin th a t provides h a rdw a re d a t a protection. the write protect pin a llows norm a l re a d/write oper a tions when con- nected to ground (gnd). when the write protect pin is connected to v cc , the write protection fe a ture is en ab led a nd oper a tes a s shown in t ab le 2. table 2. write protect memory organization at24c02b, 2k serial eeprom: intern a lly org a nized with 3 2 p a ges of 8 b ytes e a ch, the 2k requires a n 8 - b it d a t a word a ddress for r a ndom word a ddressing. wp pin status part of the array protected 24c02b at v cc full (2k) arr a y at gnd norm a l re a d/write oper a tions
4 at24c02b 5126b? s eepr?10/05 note: 1. this p a r a meter is ch a r a cterized a nd is not 100% tested. note: 1. v il min a nd v ih m a x a re reference only a nd a re not tested. table 3. pin c a p a cit a nce (1) applic ab le over recommended oper a ting r a nge from t a = 25 c, f = 1.0 mhz, v cc = +1. 8 v symbol test condition max units conditions c i/o input/output c a p a cit a nce ( s da) 8 pf v i/o = 0v c in input c a p a cit a nce (a 0 , a 1 , a 2 , s cl) 6 pf v in = 0v table 4. dc ch a r a cteristics applic ab le over recommended oper a ting r a nge from: t ai = ? 40 c to + 8 5 c, v cc = +1. 8 v to +5.5v, v cc =+1. 8 v to +5.5v (unless otherwise noted) symbol parameter test condition min typ max units v cc1 s upply volt a ge 1. 8 5.5 v v cc2 s upply volt a ge 2.5 5.5 v v cc 3 s upply volt a ge 2.7 5.5 v v cc4 s upply volt a ge 4.5 5.5 v i cc s upply current v cc = 5.0v read a t 100 khz 0.4 1.0 ma i cc s upply current v cc = 5.0v write a t 100 khz 2.0 3 .0 ma i s b1 s t a nd b y current v cc = 1. 8 vv in = v cc or v ss 0.6 3 .0 a i s b2 s t a nd b y current v cc = 2.5v v in = v cc or v ss 1.4 4.0 a i s b 3 s t a nd b y current v cc = 2.7v v in = v cc or v ss 1.6 4.0 a i s b4 s t a nd b y current v cc = 5.0v v in = v cc or v ss 8 .0 1 8 .0 a i li input le a k a ge current v in = v cc or v ss 0.10 3 .0 a i lo output le a k a ge current v out = v cc or v ss 0.05 3 .0 a v il input low level (1) ?0.6 v cc x 0. 3 v v ih input high level (1) v cc x 0.7 v cc + 0.5 v v ol2 output low level v cc = 3 .0v i ol = 2.1 ma 0.4 v v ol1 output low level v cc = 1. 8 vi ol = 0.15 ma 0.2 v
5 at24c02b 5126b? s eepr?10/05 notes: 1. this p a r a meter is ensured b y ch a r a cteriz a tion only. table 5. ac ch a r a cteristics applic ab le over recommended oper a ting r a nge from t ai = ? 40 c to + 8 5 c, v cc = +1. 8 v to +5.5v, cl = 1 ttl g a te a nd 100 pf (unless otherwise noted) symbol parameter 1.8, 2.5, 2.7 5.0-volt units min max min max f s cl clock frequency, s cl 400 1000 khz t low clock pulse width low 1.2 0.4 s t high clock pulse width high 0.6 0.4 s t i noise s uppression time 50 40 ns t aa clock low to d a t a out v a lid 0.1 0.9 0.05 0.55 s t buf time the b us must b e free b efore a new tr a nsmission c a n st a rt 1.2 0.5 s t hd. s ta s t a rt hold time 0.6 0.25 s t s u. s ta s t a rt s etup time 0.6 0.25 s t hd.dat d a t a in hold time 0 0 s t s u.dat d a t a in s etup time 100 100 ns t r inputs rise time (1) 0. 3 0. 3 s t f inputs f a ll time (1) 3 00 100 ns t s u. s to s top s etup time 0.6 .25 s t dh d a t a out hold time 50 50 ns t wr write cycle time 5 5 ms endur a nce (1) 5.0v, 25 c, byte mode 1m write cycles
6 at24c02b 5126b? s eepr?10/05 device operation clock and data transitions: the s da pin is norm a lly pulled high with a n exter- n a l device. d a t a on the s da pin m a y ch a nge only during s cl low time periods (see figure 4 on p a ge 7). d a t a ch a nges during s cl high periods will indic a te a st a rt or stop condition a s defined b elow. start condition: a high-to-low tr a nsition of s da with s cl high is a st a rt condition which must precede a ny other comm a nd (see figure 5 on p a ge 8 ). stop condition: a low-to-high tr a nsition of s da with s cl high is a stop condition. after a re a d sequence, the stop comm a nd will pl a ce the eeprom in a st a nd b y power mode (see figure 5 on p a ge 8 ). acknowledge: all a ddresses a nd d a t a words a re seri a lly tr a nsmitted to a nd from the eeprom in 8 - b it words. the eeprom sends a zero to a cknowledge th a t it h a s received e a ch word. this h a ppens during the ninth clock cycle. standby mode: the at24c02b fe a tures a low-power st a nd b y mode which is en ab led: ( a ) upon power-up a nd ( b ) a fter the receipt of the s top b it a nd the completion of a ny intern a l oper a tions. memory reset: after a n interruption in protocol, power loss or system reset, a ny 2- wire p a rt c a n b e reset b y following these steps: 1. clock up to 9 cycles. 2. look for s da high in e a ch cycle while s cl is high. 3 .cre a te a st a rt condition.
7 at24c02b 5126b? s eepr?10/05 bus timing figure 2. s cl: s eri a l clock, s da: s eri a l d a t a i/o write cycle timing figure 3. s cl: s eri a l clock, s da: s eri a l d a t a i/o note: 1. the write cycle time t wr is the time from a v a lid stop condition of a write sequence to the end of the intern a l cle a r/write cycle. figure 4. d a t a v a lidity t wr (1) s top condition s ta rt condition wordn ack 8 th bit s cl s da
8 at24c02b 5126b? s eepr?10/05 figure 5. s t a rt a nd s top definition figure 6. output acknowledge
9 at24c02b 5126b? s eepr?10/05 device addressing the 2k eeprom device requires a n 8 - b it device a ddress word following a st a rt condi- tion to en ab le the chip for a re a d or write oper a tion (refer to figure 7). the device a ddress word consists of a m a nd a tory one, zero sequence for the first four most signific a nt b its a s shown. this is common to a ll the eeprom devices. the next 3 b its a re the a2, a1 a nd a0 device a ddress b its for the 2k eeprom. these 3 b its must comp a re to their corresponding h a rd-wired input pins. the eighth b it of the device a ddress is the re a d/write oper a tion select b it. a re a d oper a - tion is initi a ted if this b it is high a nd a write oper a tion is initi a ted if this b it is low. upon a comp a re of the device a ddress, the eepr om will output a zero. if a comp a re is not m a de, the chip will return to a st a nd b y st a te. write operations byte write: a write oper a tion requires a n 8 - b it d a t a word a ddress following the device a ddress word a nd a cknowledgment. upon receipt of this a ddress, the eeprom will a g a in respond with a zero a nd then clock in the first 8 - b it d a t a word. following receipt of the 8 - b it d a t a word, the eeprom will output a zero a nd the a ddressing device, such a s a microcontroller, must termin a te the write sequence with a stop condi- tion. at this time the eeprom enters a n intern a lly timed write cycle, t wr , to the nonvol a tile memory. all inputs a re dis ab led during this write cycle a nd the eeprom will not respond until the write is complete (see figure 8 on p a ge 11). page write: the 2k eeprom is c a p ab le of a n 8 - b yte p a ge write. a p a ge write is initi a ted the s a me a s a b yte write, b ut the microcontroller does not send a stop condition a fter the first d a t a word is clocked in. inste a d, a fter the eeprom a cknowledges receipt of the first d a t a word, the microcontroller c a n tr a nsmit up to seven d a t a words. the eeprom will respond with a zero a fter e a ch d a t a word received. the microcontroller must termin a te the p a ge write sequence with a stop condition (see fig- ure 9 on p a ge 11). the d a t a word a ddress lower three b its a re intern a lly incremented following the receipt of e a ch d a t a word. the higher d a t a word a ddress b its a re not incremented, ret a ining the memory p a ge row loc a tion. when the word a ddress, intern a lly gener a ted, re a ches the p a ge b ound a ry, the following b yte is pl a ced a t the b eginning of the s a me p a ge. if more th a n eight d a t a words a re tr a nsmitted to the eeprom, the d a t a word a ddress will ?roll over? a nd previous d a t a will b e overwritten. acknowledge polling: once the intern a lly timed write cycle h a s st a rted a nd the eeprom inputs a re dis ab led, a cknowledge polling c a n b e initi a ted. this involves send- ing a st a rt condition followed b y the device a ddress word. the re a d/write b it is represent a tive of the oper a tion desired. only if the intern a l write cycle h a s completed will the eeprom respond with a zero a llowing the re a d or write sequence to continue. read operations re a d oper a tions a re initi a ted the s a me w a y a s write oper a tions with the exception th a t the re a d/write select b it in the device a ddress word is set to one. there a re three re a d oper a tions: current a ddress re a d, r a ndom a ddress re a d a nd sequenti a l re a d. current address read: the intern a l d a t a word a ddress counter m a int a ins the l a st a ddress a ccessed during the l a st re a d or write oper a tion, incremented b y one. this a ddress st a ys v a lid b etween oper a tions a s long a s the chip power is m a int a ined. the a ddress ?roll over? during re a d is from the l a st b yte of the l a st memory p a ge to the first
10 at24c02b 5126b? s eepr?10/05 b yte of the first p a ge. the a ddress ?roll over? during write is from the l a st b yte of the current p a ge to the first b yte of the s a me p a ge. once the device a ddress with the re a d/write select b it set to one is clocked in a nd a cknowl- edged b y the eeprom, the current a ddress d a t a word is seri a lly clocked out. the microcontroller does not respond with a n input zero b ut does gener a te a following stop condi- tion (see figure 10 on p a ge 11). random read: a r a ndom re a d requires a ?dummy? b yte write sequence to lo a d in the d a t a word a ddress. once the device a ddress word a nd d a t a word a ddress a re clocked in a nd a cknowledged b y the eeprom, the microcontroller must gener a te a nother st a rt condition. the microcontroller now initi a tes a current a ddress re a d b y sending a device a ddress with the re a d/write select b it high. the eeprom a cknowledges the device a ddress a nd seri a lly clocks out the d a t a word. the microcontroller does not respond with a zero b ut does gener a te a fol- lowing stop condition (see figure 11 on p a ge 12). sequential read: s equenti a l re a ds a re initi a ted b y either a current a ddress re a d or a r a n- dom a ddress re a d. after the microcontroller receives a d a t a word, it responds with a n a cknowledge. as long a s the eeprom receives a n a cknowledge, it will cont inue to increment the d a t a word a ddress a nd seri a lly clock out sequenti a l d a t a words. when the memory a ddress limit is re a ched, the d a t a word a ddress will ?roll over? a nd the sequenti a l re a d will con- tinue. the sequenti a l re a d oper a tion is termin a ted when the microcontroller does not respond with a zero b ut does gener a te a following stop condition (see figure 12 on p a ge 12).
11 at24c02b 5126b? s eepr?10/05 figure 7. device address figure 8. byte write figure 9. p a ge write figure 10. current address re a d
12 at24c02b 5126b? s eepr?10/05 figure 11. r a ndom re a d figure 12. s equenti a l re a d
13 at24c02b 5126b? s eepr?10/05 notes: 1. for 2.7v devices used in the 4.5v to 5.5v r a nge, ple a se refer to perform a nce v a lues in the ac a nd dc ch a r a cteristics t ab le. 2. ?u? design a tes green p a ck a ge & roh s compli a nt. 3 . ?h? design a tes green p a ck a ge & roh s compli a nt with nipdau le a d finish. 4. av a il ab le in w a ffle p a ck a nd w a fer form; order a s s l7 88 for inkless w a fer form. bumped die a v a il ab le upon request. ple a se cont a ct s eri a l eeprom m a rketing. at24c02b ordering information (1) ordering code package operation range at24c02b-10pu-1. 8 (2) at24c02bn-10 s u-1. 8 (2) at24c02b-10tu-1. 8 (2) at24c02by6-10yh-1. 8 ( 3 ) at24c02b-10t s u-1. 8 (2) at24c02bu 3 -10uu-1. 8 (2) 8 p 3 8s 1 8 a2 8 y6 5t s 1 8 u 3 -1 le a d-free/h a logen-free/ industri a l temper a ture (?40 c to 8 5 c) at24c02b-w1. 8 -11 (4) die sa le industri a l temper a ture (?40 c to 8 5 c) package type 8p3 8 -le a d, 0. 3 00" wide, pl a stic du a l inline p a ck a ge (pdip) 8s1 8 -le a d, 0.150" wide, pl a stic gull wing s m a ll outline (jedec s oic) 8a2 8 -le a d, 4.4 mm body, pl a stic thin s hrink s m a ll outline p a ck a ge (t ss op) 8y6 8 -le a d, 2.0 mm x 3 .00 mm body, 0.50 mm pitch, ultr a thin mini-map, du a l no le a d p a ck a ge (dfn), (mlp 2x 3 mm) 5ts1 5-le a d, 2.90 mm x 1.60 mm body, pl a stic thin s hrink s m a ll outline p a ck a ge ( s ot2 3 ) 8u3-1 8 - ba ll, die b a ll grid aw a y p a ck a ge (dbga2) options ? 1.8 low-volt a ge (1. 8 v to 5.5v)
14 at24c02b 5126b? s eepr?10/05 packaging information 8p3 ? pdip 2325 orchard parkway san jo s e, ca 95131 title drawing no. r rev. 8 p 3 , 8-lead, 0.300" wide body, pla s tic d u al in-line package (pdip) 01/09/02 8p3 b note s : 1. thi s drawing i s for general information only; refer to jedec drawing ms-001, variation ba, for additional information. 2. dimen s ion s a and l are mea su red with the package s eated in jedec s eating plane ga u ge gs-3. 3. d, d1 and e1 dimen s ion s do not incl u de mold fla s h or protr us ion s . mold fla s h or protr us ion s s hall not exceed 0.010 inch. 4. e and ea mea su red with the lead s con s trained to be perpendic u lar to dat u m. 5. pointed or ro u nded lead tip s are preferred to ea s e in s ertion. 6. b2 and b3 maxim u m dimen s ion s do not incl u de dambar protr us ion s . dambar protr us ion s s hall not exceed 0.010 (0.25 mm). common dimen s ion s (unit of mea su re = inche s ) s ymbol min nom max note d d1 e e1 e l b2 b a2 a 1 n ea c b3 4 plcs a ? ? 0.210 2 a2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 d 0.355 0.365 0.400 3 d1 0.005 ? ? 3 e 0.300 0.310 0.325 4 e1 0.240 0.250 0.280 3 e 0.100 bsc ea 0.300 bsc 4 l 0.115 0.130 0.150 2 top view side view end view
15 at24c02b 5126b? s eepr?10/05 8s1 ? jedec soic 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 title drawing no. r rev. note: 10/7/03 8s1 , 8-lead (0.150" wide body), plastic gull wing small outline (jedec soic) 8s1 b common dimensions (unit of measure = mm) symbol min nom max note a1 0.10 ? 0.25 these drawings are for general information only. refer to jedec drawing ms-012, variation aa for proper dimensions, tolerances, datums, etc. a 1.35 ? 1.75 b 0.31 ? 0.51 c 0.17 ? 0.25 d 4.80 ? 5.00 e1 3.81 ? 3.99 e 5.79 ? 6.20 e 1.27 bsc l 0.40 ? 1.27 ? 0? ? 8? ? top view end view side view e b d a a1 n e 1 c e1 l
16 at24c02b 5126b? s eepr?10/05 8a2 ? tssop 2 3 25 orch a rd p a rkw a y sa n jose, ca 951 3 1 title drawing no. r rev. 5/ 3 0/02 common dimensions (unit of me a sure = mm) symbol min nom max note d 2.90 3 .00 3 .10 2, 5 e 6.40 b s c e1 4. 3 0 4.40 4.50 3 , 5 a ? ? 1.20 a2 0. 8 0 1.00 1.05 b 0.19 ? 0. 3 04 e 0.65 b s c l 0.45 0.60 0.75 l1 1.00 ref 8a2 , 8 -le a d, 4.4 mm body, pl a stic thin s hrink s m a ll outline p a ck a ge (t ss op) notes: 1. this dr a wing is for gener a l inform a tion only. refer to jedec dr a wing mo-15 3 , v a ri a tion aa, for proper dimensions, toler a nces, d a tums, etc. 2. dimension d does not include mold fl a sh, protrusions or g a te b urrs. mold fl a sh, protrusions a nd g a te b urrs sh a ll not exceed 0.15 mm (0.006 in) per side. 3 . dimension e1 does not include inter-le a d fl a sh or protrusions. inter-le a d fl a sh a nd protrusions sh a ll not exceed 0.25 mm (0.010 in) per side. 4. dimension b does not include d a m ba r protrusion. allow ab le d a m ba r protrusion sh a ll b e 0.0 8 mm tot a l in excess of the b dimension a t m a ximum m a teri a l condition. d a m ba r c a nnot b e loc a ted on the lower r a dius of the foot. minimum sp a ce b etween protrusion a nd a dj a cent le a d is 0.07 mm. 5. dimension d a nd e1 to b e determined a t d a tum pl a ne h. 8 a2 b s ide view end view top view a2 a l l1 d 1 2 3 e1 n b pin 1 indic a tor this corner e e
17 at24c02b 5126b? s eepr?10/05 8y6 - mini map 2325 orchard parkway san jo s e, ca 95131 title drawing no. r rev. 8 y6 , 8-lead 2.0 x 3.0 mm body, 0.50 mm pitch, utlra thin mini-map, d u al no lead package (dfn), (mlp 2x3) c 8y6 8/26/05 note s : 1. thi s drawing i s for general information only. refer to jedec drawing mo-229, for proper dimen s ion s , tolerance s , dat u m s , etc. 2. dimen s ion b applie s to metallized terminal and i s mea su red between 0.15 mm and 0.30 mm from the terminal tip. if the terminal ha s the optional radi us on the other end of the terminal, the dimen s ion s ho u ld not be mea su red in that radi us area. common dimen s ion s (unit of mea su re = mm) s ymbol min nom max note d 2.00 bsc e 3.00 bsc d2 1.40 1.50 1.60 e2 - - 1.40 a - - 0.60 a1 0.0 0.02 0.05 a2 - - 0.55 a3 0.20 ref l 0.20 0.30 0.40 e 0.50 bsc b 0.20 0.25 0.30 2 a2 a 2 b (8x) ( 8 x ) pin 1 id p i n 1 i d pin 1 p i n 1 index i n d e x area a r e a a1 a 1 a3 a 3 d e a l (8x) l ( 8 x ) e (6x) e ( 6 x ) 1.50 ref. 1 . 5 0 r e f . d2 d 2 e2 e 2
18 at24c02b 5126b? s eepr?10/05 5ts1 ? sot23 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 title drawing no. r rev. po5ts1 a 6/25/03 common dimensions (unit of measure = mm) symbol min nom max note 5ts1, 5-lead, 1.60 mm body, plastic thin shrink small outline package (shrink sot) a ? ? 1.10 a1 0.00 ? 0.10 a2 0.70 0.90 1.00 c 0.08 ? 0.20 4 d 2.90 bsc 2, 3 e 2.80 bsc 2, 3 e1 1.60 bsc 2, 3 l1 0.60 ref e 0.95 bsc e1 1.90 bsc b 0.30 ? 0.50 4, 5 notes: 1. this drawing is for general information only. refer to jedec drawing mo-193, variation ab, for additional information. 2. dimension d does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per end. dimension e1 does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 mm per side. 3. the package top may be smaller than the package bottom. dimensions d and e1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. 4. these dimensions apply to the flat section of the lead between 0.08 mm and 0.15 mm from the lead tip. 5. dimension "b" does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the "b" dimension at maximum material condition. the dambar cannot be located on the lower radius of the foot. minimum space between protrusion and an adjacent lead shall not be less than 0.07 mm. 5 4 2 l1 l c end view c a a2 a1 b e seating plane d side view e1 e1 3 1 top view e
19 at24c02b 5126b? s eepr?10/05 8u3-1 ? dbga2 1150 e. cheyenne mtn. blvd. colorado spring s , co 80906 title drawing no. r rev. po8u3-1 a 6/24/03 common dimen s ion s (unit of mea su re = mm) s ymbol min nom max note 8 u 3 -1, 8-ball, 1.50 x 2.00 mm body, 0.50 mm pitch, small die ball grid array package (dbga2) a 0.71 0.81 0.91 a1 0.10 0.15 0.20 a2 0.40 0.45 0.50 b 0.20 0.25 0.30 d 1.50 bsc e 2.00 bsc e 0.50 bsc e1 0.25 ref d 1.00 bsc d1 0.25 ref 1. dimen s ion ?b ? i s mea su red at the maxim u m s older ball diameter. thi s drawing i s for general information only. bottom view 8 solder balls b d e top view pin 1 ball pad corner a side view a 2 a 1 4 5 pin 1 ball pad corner 3 1 e 2 6 7 8 d (e1) (d1) 1.
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